These days, a phenomenon in which, when a voltage is applied to some kinds of metal oxide, the electric resistance value of the metal oxide changes between values at two levels has been found, and a memory device utilizing this phenomenon is proposed. Such a memory device is called a resistance change memory device (resistance random access memory; ReRAM).
FIGS. 14A to 14C are diagrams schematically showing operations of a conventional resistance change memory device. FIG. 14A shows an initial state, FIG. 14B shows a low resistance state, and FIG. 14C shows a high resistance state.
FIG. 15 is a graph illustrating the I-V characteristics of the conventional resistance change memory device, with the voltage on the horizontal axis and the current on the vertical axis.
As shown in FIG. 14A, in a memory cell 110 of a conventional resistance change memory device 101, a lower electrode 111, a resistance change layer 112, and an upper electrode 113 are stacked in this order. A power supply circuit 115 is provided in the resistance change memory device 101, and is connected between the lower electrode 111 and the upper electrode 113. The resistance change layer 112 is made of a metal oxide, and includes a large number of oxygen-deficient portions 114. The oxygen-deficient portion 114 is a portion where the concentration of oxygen is relatively low and the concentration of metal is relatively high. In the initial state, the oxygen-deficient portions 114 are randomly scattered in the resistance change layer 112, and the resistance change layer 112 has a high electric resistance value. In FIG. 15, the initial state is shown as state S0.
As shown as operation M1 in FIG. 15, when the power supply circuit 115 applies a voltage at which the upper electrode 113 becomes a positive pole and the lower electrode 111 becomes a negative pole (a positive voltage) between the lower electrode 111 and the upper electrode 113, a current path formed of oxygen-deficient portions 114 is formed in the resistance change layer 112 as shown in FIG. 14B. The current path is referred to as a “filament,” and the operation of forming a filament 116 in the resistance change layer 112 in the initial state is referred to as “forming.” Thereby, the resistance change layer 112 transitions to a low resistance state (LRS) and a large current flows, as shown as state S1 in FIG. 15. The power supply circuit 115 is provided with a current limiting mechanism, and the current flowing through the memory cell 110 is limited to 5 mA or less, for example.
Next, as shown as operation M2 in FIG. 15, the voltage applied between the lower electrode 111 and the upper electrode 113 is continuously decreased to a negative voltage. Consequently, when the voltage has reached a prescribed negative value as shown as state S2 in FIG. 15, the resistance change layer 112 transitions to a high resistance state (HRS) and the flowing current is reduced. This operation is referred to as “reset.” It is presumed that, in the high resistance state, oxygen-deficient portions 114 are dislocated from one end portion of the filament 116 as shown in FIG. 14C.
After that, as shown as operation M3 in FIG. 15, when the voltage is brought close to zero continuously, the I-V characteristics change in accordance with Ohm's law while the resistance change layer 112 maintains the high resistance state. Then, when the voltage increases across zero and has reached a certain positive value, the resistance change layer 112 returns to the low resistance state and the current increases discontinuously, as shown as state S3 in FIG. 15. This operation is referred to as “set.” At this time, it is presumed that the missing portions of the filament 116 are restored and continuously arranged between the lower electrode 111 and the upper electrode 113 again, as shown in FIG. 14B.
After that, by repeating operations M2 and M3, resetting and setting may be repeated to switch between the low resistance state and the high resistance state arbitrarily. In this way, two values of information can be written on one memory cell. The written information can be read by detecting the magnitude of the current flowing when a prescribed read voltage, for example a voltage of −0.1 V, is applied between the electrodes.
However, such a conventional resistance change memory device has a problem that the ON/OFF ratio of the electric resistance value, that is, the value of the ratio of the magnitude of the current flowing in the lime of the low resistance state to the magnitude of the current flowing in the time of the high resistance state when a prescribed read voltage is applied, is low. In the example shown in FIG. 15, the ON/OFF ratio is approximately 101. In this case, when ten memory cells are connected in series and a current is passed, even if all the memory cells are in the high resistance state, a current substantially equal to that when one memory cell is in the low resistance state flows, and it is difficult to find the value stored. Thus, if the ON/OFF ratio is low, it is difficult to achieve higher integration of memory cells. In resistance change memory cells of the conventional system in which a filament is formed in a metal oxide, the ON/OFF ratio is approximately 102 at highest.
Furthermore, in the conventional resistance change memory device, it is necessary to perform forming on the resistance change layer in the initial state. The forming is based on the hope that a filament will be formed in the resistance change layer incidentally; thus, the control is difficult.
Non-Patent Document 1 discloses a technology in which a resistance change layer is configured to be a thin film to facilitate the formation of a filament and eliminate the need for forming. Non-Patent Document 1 has a description in which, in a (TiN/TiOx/HfOx/TiN) stacked structure, the forming voltage can be lowered as the film thickness of the HfOx film, which is the resistance change layer, is reduced, and the forming voltage can be made substantially zero when the film thickness of the HfOx film is set to 3 nm or less.
Non-Patent Document 2 discloses a technology in which the formation of a filament is made easier by adding a different kind of element into the resistance change layer to introduce a defect. Non-Patent Document 2 has a description in which, in an (Al/AlO:N/Al) stacked structure, the forming voltage can be made equal to the set voltage by introducing nitrogen into the (AlO:N) film, which is the resistance change layer.
However, the technologies disclosed in Non-Patent Documents 1 and 2 can only reduce the forming voltage to a level substantially equal to the set voltage or less, and cannot increase the ON/OFF ratio. Thus, it is still difficult to achieve higher integration of memory cells.